Nanosize - scalability
The small feature size of the qubits makes it an excellent candidate for scaling to large numbers of qubits. Using standard wafers and standard dies, a typical pitch of ~50 nm allows for millions or billions of qubits in one chip.
Long coherence time
The use of 28-Si quantum wells on a Si/SiGe wafer yields a stable environment for long-lived qubits, with T2* times well over 6 microseconds and T1 times over 20 ms. Even at higher temperatures of a few Kelvin, the coherence times are hardly affected.
Design and fabrication is based on standard CMOS prefab processes for growth, litho, etching, cleaning etc, enabling mass-production in standard fabs. This also opens up integration with classical digital electronics in the same chip.
"Quantum Inspire, a new European success story in quantum computing that will complement our efforts in the Quantum Flagship. Its availability via the cloud will help public and private users start to become familiar with advanced quantum technologies, and to develop promising applications in the field."
Tuning and calibration
Low level compiler
Classical to quantum
Spin-2 is our first-generation back-end based on semiconducting quantum hardware. Next development steps will be to increase the qubit count, improve the operational fidelities and improve on the control hardware to make more powerfull processors with a larger range of possibilities.
Become a partner of QuTech
One of Europe's largest research and innovation initiatives bringing together scientist and engineers from academia and industry, as well as future users of Quantum Technologies.